Publications and Presentations by the ACIS Lab

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C
M. T. O'Keefe and J. A. B. Fortes, “A Comparative Study of Two Systematic Design Methodologies for Systolic Arrays (Extended Version)”, International Workshop on Parallel Agorithms and Architectures. p. 313-324, 1986.
M. T. O'Keefe and J. A. B. Fortes, “A Comparative Study of Two Systematic Design Methodologies for Systolic Arrays”, International Conference on Parallel Processing. p. 672-675, 1986.
D
M. T. O'Keefe and J. A. B. Fortes, “Degradable Processor Arrays”, International Conference on Parallel Processing. p. 672-675, 1986.
L
W. Shang, M. T. O'Keefe, and J. A. B. Fortes, “On loop transformations for generalized cycle shrinking”, Parallel and Distributed Systems, IEEE Transactions , vol. 5, no. 2, 1994.