Publications and Presentations by the ACIS Lab

Found 238 results
Sort by: Author Title Type [ Year (Desc)]
Filters: Author is J. Fortes  [Clear All Filters]
2008
K. Keahey, R. Figueiredo, J. A. B. Fortes, T. Freeman, and M. Tsugawa, “Science Clouds: Early Experiences in Cloud Computing for Scientific Applications”, in Cloud Computing and Its applications, 2008.
J. Sanchez, J. Principe, T. Nishida, R. Bashirullah, J. Harris, and J. A. B. Fortes, “Technology and Signal Processing for Brian-Machine Interfaces”, Signal Processing Magazine, vol. 25, no. 1, p. 29-40, 2008.
V. Ravinuthula, V. Garg, J. Harris, and J. A. B. Fortes, “Time-Mode Circuits for Analog Computation”, International Journal of Circuit Theory and Applications, vol. 37, no. 5, p. 631-659, 2008.
2007
W. Zhang, X. Fu, T. Li, and J. A. B. Fortes, “An Analysis of Microarchitecture Vulnerability to Soft Errors on Simultaneous Multithreaded Architectures”, in International Symposium on Performance Analysis of Systems and Software (ISPASS), 2007.
E. Taylor and J. A. B. Fortes, “Device Variability Impact on Logic Gate Failure Rates”, in Government Microcircuit Application and Critical Technology Conference (GOMACTech-07), 2007.
A. Matsunaga, M. Tsugawa, and J. A. B. Fortes, “Integration of text-based applications into service-oriented architectures for transnational digital government”, in Proceedings of the 8th annual international conference on Digital government research: bridging disciplines & domains, Philadelphia, Pennsylvania, 2007, p. 112-121.
J. DiGiovanna, et al., “Towards Real-Time Distributed Signal Modeling for Brain Machine Interfaces”, in International Conference on Computational Science (ICCS 2007) - DDDAS Workshop, 2007.
J. Xu, M. Zhao, R. Carpenter, and J. A. B. Fortes, “On the Use of Fuzzy Modeling in Virtualized Data Center Management”, in International Conference on Autonomic Computing (ICAC), 2007.
2006
X. Fu, J. Poe, T. Li, and J. A. B. Fortes, “Characterizing Microarchitecture Soft Error Vulnerability Phase Behavior”, in International Symposium on Modeling, Analysis, and Simulation of Computer and Telecommunication Systems, 2006.
J. A. B. Fortes, R. Figueiredo, L. Hermer-Vazquez, J. Principe, and J. Sanchez, “A New Architecture for Deriving Dynamic Brain-Machine Interfaces”, in International Conference on Computational Science (ICCS 2006 - DDDAS Workshop), 2006.
J. A. B. Fortes, “Probabilistic Computation”, in 2006 IEEE Conference on Nanotechnology (IEEE-NANO 2006), 2006.
A. Matsunaga, M. Tsugawa, S. Adabala, R. J. Figueiredo, H. Lam, and J. A. B. Fortes, “Science Gateways Made Easy: The In-VIGO Approach”, Concurrency and Computation: Practice and Experience, vol. 19, p. 905-919, 2006.
X. Fu, T. Li, and J. A. B. Fortes, “Sim-SODA: A Unified Framework for Architectural Level Software Reliability Analysis”, in 33rd Annual International Symposium on Computer Architecture - Benchmarking and Simulation: Workshop on Modeling, 2006.
E. Taylor, J. Han, and J. A. B. Fortes, “Towards the Accurate and Efficient Reliability Modeling of Nanoelectronic Circuits”, in 2006 IEEE Conference on Nanotechnology (IEEE-NANO 2006), 2006.
M. Tsugawa and J. A. B. Fortes, “A Virtual Network (ViNe) Architecture for Grid Computing”, in 20th International Parallel and Distributed Processing Symposium (IPDPS 2006), 2006.
M. Tsugawa, A. Matsunaga, and J. A. B. Fortes, “Virtualization technologies in transnational DG (poster)”, in Proceedings of the 2006 international conference on Digital government research, San Diego, California, 2006, p. 456-457.
2005
L. Zhu, A. Matsunaga, V. Sanjeepan, H. Lam, and J. A. B. Fortes, “Application Modeling and Representation for Automatic Grid-Enabling of Legacy Applications”, in 1st IEEE International Conference on e-Science and Grid Computing, 2005, p. 24-31.
J. B. Gao, Y. Qi, and J. 'A. B. Fortes, “Bifurcations and fundamental error bounds for fault-tolerant computations”, IEEE Transactions on Nanotechnology, vol. 4, no. 4, p. 395-402, 2005.
J. Han, E. Taylor, J. Gao, and J. A. B. Fortes, “Faults, Error Bounds and Reliability of Nanoelectronic Circuits”, in IEEE 16th International Conference on Application-Specific Systems, Architectures and Processors (IEEE-ASAP 2005), 2005.
S. Adabala, et al., “From virtualized resources to virtual computing grids: the In-VIGO system”, Future Gener. Comput. Syst., vol. 21, p. 896-909, 2005.
M. Tsugawa, et al., “In-VIGO virtual networks and virtual application services: automated grid-enabling and deployment of applications (poster)”, in Proceedings of the 2005 14th IEEE International Symposium on High Performance Distributed Computing, 2005, p. 312-313.
Y. Qi, J. Gao, and J. A. B. Fortes, “Markov Chains and Probabilistic Computation: A General Framework for Multiplexed Nanoelectronic System”, vol. 4, 2005.
K. Shah, P. Chiu, M. Jain, J. 'A. B. Fortes, B. Moudgil, and S. Sinnott, “Morphology and Mechanical Properties of Surfactant Aggregates at Water−Silica Interfaces:  Molecular Dynamics Simulations”, Langmuir, vol. 21, no. 12, p. 5337–5342, 2005.
V. Ravinuthula, J. Harris, and J. A. B. Fortes, “Reliability Improvement in Time-mode Nanocomputation”, in First International Conference on Bio-Nano-Informatics (BNI) Fusion, 2005.
J. Han, E. Taylor, J. Gao, and J. A. B. Fortes, “Reliability Modeling of Majority-Logic Based Nanoelectronic Circuits”, in 5th IEEE Conference on Nanotechnology (IEEE-NANO 2005), 2005.

Pages