Publications and Presentations by the ACIS Lab

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E. Taylor and J. A. B. Fortes, “Device Variability Impact on Logic Gate Failure Rates”, in Government Microcircuit Application and Critical Technology Conference (GOMACTech-07), 2007.
F
J. Han, E. Taylor, J. Gao, and J. A. B. Fortes, “Faults, Error Bounds and Reliability of Nanoelectronic Circuits”, in IEEE 16th International Conference on Application-Specific Systems, Architectures and Processors (IEEE-ASAP 2005), 2005.
R
J. Han, E. Taylor, J. Gao, and J. A. B. Fortes, “Reliability Modeling of Majority-Logic Based Nanoelectronic Circuits”, in 5th IEEE Conference on Nanotechnology (IEEE-NANO 2005), 2005.
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E. Taylor, J. Han, and J. A. B. Fortes, “Towards the Accurate and Efficient Reliability Modeling of Nanoelectronic Circuits”, in 2006 IEEE Conference on Nanotechnology (IEEE-NANO 2006), 2006.