Publications and Presentations by the ACIS Lab

Found 6 results
Sort by: [ Author (Asc)] Title Type Year
Filters: First Letter Of Last Name is V  [Clear All Filters]
A B C D E F G H I J K L M N O P Q R S T U [V] W X Y Z   [Show ALL]
V
G. Venkatasubramanian and R. J. Figueiredo, “A Nanoscale Memory Interface Scheme Based on Hierarchical Memory Mapping”, in IEEE Nano, 2006.
G. Venkatasubramanian, R. Illikkal, D. Newell, and R. J. Figueiredo, “TMT - A TLB Tag Management Framework for Virtualized Platforms”, in Proceedings of SBAC-PAD 21st International Symposium on Computer Architecture and High Performance Computing, 2009.
G. Venkatasubramanian, R. Illikkal, D. Newell, and R. J. Figueiredo, “A Simulation Analysis of Shared TLBs with Tag-based Partitioning in Multicore Virtualized Environments”, in Proceedings of the 2nd International Workshop on Managed Multi-Core Systems, 2009.
G. Venkatasubramanian, R. J. Figueiredo, and R. Illikkal, “On the Performance of Tagged Translation Lookaside Buffers: A Simulation-Driven Analysis”, in 19th International Symposium on Modeling, Analysis, and Simulation of Computer and Telecommunication Systems (MASCOTS), 2011.
G. Venkatasubramanian, P. O. Boykin, and R. J. Figueiredo, “Design of High-Yield Defect-Tolerant Self-Assembled Nanoscale Memories”, in IEEE/ACM International Symp. on Nanoscale Architectures (NANOARCH), 2007.
G. Venkatasubramanian, R. J. Figueiredo, R. Illikkal, and D. Newell, “A Simulation Framework for the Analysis of TLB behavior in Virtualized Environments”, in 18th IEEE International Symposium on Modeling, Analysis and Simulation of Computer and Telecommunication Systems (MASCOTS), 2010.