Publications and Presentations by the ACIS Lab

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J. A. B. Fortes, M. Davis, J. Harris, and R. Figueiredo, “Nanoelectronic Adaptive Systems”, in Government Microcircuit Applications and Critical Technology Conference (GOMACtech), 2003.
G. Venkatasubramanian and R. J. Figueiredo, “A Nanoscale Memory Interface Scheme Based on Hierarchical Memory Mapping”, in IEEE Nano, 2006.
S. Datta, et al., “NASA University Research Education and Technology: Institute for Nanoelectronics and Computing”, in NASA University Research Education and Technology: Institute for Nanoelectronics and Computing, 2003.
X. Fu, T. Li, and J. A. B. Fortes, “NBTI Tolerant Microarchitecture Design in the Presence of Process Variation”, in 41st International Symposium on Microarchitecture (Micro-41 2008), 2008.
N. Kapadia, M. S. Lundstrom, and J. A. B. Fortes, “A Network-based Simulation Hub for Microelectronic Technologies CAD”, IEEE Computer Society 1996 Annual Workshop on VLSI. 1996.
N. H. Kapadia, M. S. Lundstrom, J. A. B. Fortes, and K. Rooy, “Network-Based Simulation Laboratories for Microelectronics Systems Design and Education”, International Conference on Microelectronic Systems Education. p. 23-24, 1997.
R. J. Figueiredo, et al., “Network-Computer for Computer Architecture Education: A Progress Report”, in American Society of Engineering Education (ASEE) Annual Conference, Albuquerque, New Mexico, June 2001, 2001.
R. J. Figueiredo, et al., “A Network-Computing Infrastructure for Tool Experimentation Applied to Computer Architecture Education”, in 27th Annual International Symposium on Computer Architecture (ISCA'2000) - Workshop on Computer Architecture Education, Vancouver, Canada, 2000.
J. A. B. Fortes, R. Figueiredo, L. Hermer-Vazquez, J. Principe, and J. Sanchez, “A New Architecture for Deriving Dynamic Brain-Machine Interfaces”, in International Conference on Computational Science (ICCS 2006 - DDDAS Workshop), 2006.