Publications and Presentations by the ACIS Lab

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Conference Paper
Y. Xu, L. Wang, D. Clavijo, Y. Liu, R. J. Figueiredo, and M. Zhao, “Virtualization-based Bandwidth Management for Parallel Storage Systems”, in 5th Petascale Data Storage Workshop, Supercomputing’10, New Orleans, LA, 2010.
I. Krsul, A. Ganguly, J. Zhang, J. 'A. B. Fortes, and R. J. Figueiredo, “VMPlants: Providing and Managing Virtual Machine Execution Environments for Grid Computing”, in Supercomputing 2004 High Performance Computing, Networking, and Storage Conference (SC2004), 2004.
Y. Xu, D. Arteaga, M. Zhao, Y. Liu, R. J. Figueiredo, and Seetharami Seelam, “vPFS: Virtualization-based Bandwidth Management for Parallel Storage Systems”, in 28th IEEE Conference on Massive Data Storage (MSST’12), Pacific Grove, CA, 2012.
Y. Li, T. Li, T. Kahveci, and J. A. B. Fortes, “Workload Characterization of Bioinformatics Applications on Pentium 4 Architecture,”, in International Symposium on Modeling, Analysis, and Simulation of Computer and Telecommunication Systems (MASCOTS), 2005.
A. Ganguly, A. Agrawal, P. O. Boykin, and R. J. Figueiredo, “WOW: Self-organizing Wide-area Overlay Networks of Virtual Workstations”, in Proc. High Performance Distributed Computing (HPDC), 2006.
Conference Proceedings
R. Figueiredo, et al., “Archer: A Community Distributed Computing Infrastructure for Computer Architecture Research and Education”, The 4th International Conference on Collaborative Computing (CollaborateCom 2008). 2008.
H. J. Lee and J. A. B. Fortes, “Automatic Generation of Modular Mappings”, International Conference on Application-Specific Systems, Architectures and Processors. p. 155-164, 1996.
S. Kadirvel and J. A. B. Fortes, “Autonomic Approach to Fault and Performance Management in Map-Reduce Clusters”, 43th Annual IEEE/IFIP International Conference on Dependable Systems and Networks (DSN 2012). 2012.
M. Tsugawa and J. A. B. Fortes, “Characterizing User-level Network Virtualization: Performance, Overheads, and Limits”, 4th IEEE International Conference on e-Science. 2008.
H. Zhao, et al., “CloudBay: Enabling an Online Resource Market Place for Open Clouds”, 5th IEEE/ACM International Conference on Utility and Cloud Computing (UCC 2012). 2012.
M. T. O'Keefe and J. A. B. Fortes, “A Comparative Study of Two Systematic Design Methodologies for Systolic Arrays (Extended Version)”, International Workshop on Parallel Agorithms and Architectures. p. 313-324, 1986.
M. T. O'Keefe and J. A. B. Fortes, “A Comparative Study of Two Systematic Design Methodologies for Systolic Arrays”, International Conference on Parallel Processing. p. 672-675, 1986.
M. S. Lundstrom, N. Kapadia, and J. A. B. Fortes, “The Computational Electronics Hub: A Network-Based Simulation Laboratory”, Workshop on Materials and Process Research and the Information Highway. 1996.
J. A. B. Fortes and D. I. Moldovan, “Data Broadcasting in Linearly Scheduled Array Processors”, 11th International Symposium on Computer Architecture. p. 224-232, 1984.
M. A. Samad and J. A. B. Fortes, “DEFT - A Design-for-Testability Expert Systems”, Fall Joint Computer Conference. p. 899-908, 1986.
M. T. O'Keefe and J. A. B. Fortes, “Degradable Processor Arrays”, International Conference on Parallel Processing. p. 672-675, 1986.
M. Kandaswamy, et al., “The Design of a Hierarchical Processors-and-Memory Architecture for High Performance Computing”, 6th Symposium on the Frontiers of Massively Parallel Computation (FRONTIERS '96) - Workshop on The Petaflops Frontier. 1996.
D. Wolinsky, K. Lee, P. O. Boykin, and R. J. Figueiredo, “On the Design of Autonomic, Decentralized VPNs”, 6th International Conference on Collaborative Computing (CollaborateCom 2010). p. 1 -10, 2010.
C. Jeffery, A. Basagalar, and R. J. Figueiredo, “Dynamic Sparing and Error Correction Techniques for Fault Tolerance in Nanoscale Memory Structures”, Proc. IEEE International Conference on Nanotechnology (NANO). 2004.
J. A. B. Fortes and C. S. Raghavendra, “Dynamically Reconfigurable Fault Tolerant Array Processors”, 14th International Symposium on Fault-Tolerant Computing. p. 386-392, 1984.
J. Miguel, A. Arruabarrena, R. Beivide, and J. A. B. Fortes, “An Empirical Evaluation of Techniques for Parallel Discrete-event Simulation of Interconnection Networks”, 4th Euro-micro Workshop on Parallel and Distributed Processing. 1996.
M. A. Samad and J. A. B. Fortes, “Explanation Capabilities in a Design-for-Testability Expert System”, International Test Conference (ITC'86). p. 954-963, 1986.
A. Butt, S. Adabala, N. Kapadia, R. Figueiredo, and J. A. B. Fortes, “Fine-Grain Access Control for Securing Shared Resources in Computational Grids”, International Parallel and Distributed Processing Symposium, 8 pages, April 15-19, 2002. (Proceedings in CD format). 2002.
H. J. Lee, J. Robertson, and J. A. B. Fortes, “Generalized Cannon's Algorithm for Parallel Matrix Multiplication”, 11th ACM International Conference on Supercomputing. p. 44-51, 1997.
B. Z. Miled and J. A. B. Fortes, “A Heterogeneous Hierarchical Solution to Cost-efficient High Performance Computing”, 8th IEEE Symposium on Parallel and Distributed Processing. 1996.

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