Publications and Presentations by the ACIS Lab

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Conference Proceedings
M. Kandaswamy, et al., “The Design of a Hierarchical Processors-and-Memory Architecture for High Performance Computing”, 6th Symposium on the Frontiers of Massively Parallel Computation (FRONTIERS '96) - Workshop on The Petaflops Frontier. 1996.
M. Kandaswamy, V. Taylor, R. Eigenmann, and J. A. B. Fortes, “Implicit Finite Element Applications: A Case for Matching the Number of Processors to the Dynamics of the Program Execution”, 8th SIAM Conference on Parallel Processing. 1997.