Publications and Presentations by the ACIS Lab

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Conference Proceedings
J. A. B. Fortes and C. S. Raghavendra, “Dynamically Reconfigurable Fault Tolerant Array Processors”, 14th International Symposium on Fault-Tolerant Computing. p. 386-392, 1984.
Journal Article
J. A. B. Fortes and C. S. Raghavendra, “Gracefully Degradable Processor Arrays”, IEEE Transactions on Computers, vol. C-34, p. 1033-1045, 1985.