Publications and Presentations by the ACIS Lab

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A. Matsunaga, et al., “A Computational- and Storage-Cloud for Integration of Biodiversity Collections”, in 2013 IEEE 9th International Conference on e-Science, Beijing, China, 2013, p. 78-87.
A. Matsunaga, M. Tsugawa, and J. A. B. Fortes, “Getting on the Virtual Bus: By way of some common virtualization tools, agencies can make SOA their next stop for legacy apps”, FEDTECH, vol. 5, p. 31-32, 2008.
A. Matsunaga, M. Tsugawa, and J. Fortes, “Scaling-out CloudBLAST: Combining Technologies to BLAST on the Sky”, in The Third IEEE International Scalable Computing Challenge (SCALE 2010), Melbourne, Australia, 2010.
A. Matsunaga, M. Tsugawa, S. Adabala, R. J. Figueiredo, H. Lam, and J. 'A. B. Fortes, “Science Gateways Made Easy: the In-VIGO Approach”, in 14th Global Grid Forum (GGF14) - Workshop on Science Gateways, 2005.
A. Matsunaga and J. A. B. Fortes, “On the use of machine learning to predict the time and resources consumed by applications”, in Proceedings of the 2010 10th IEEE/ACM International Conference on Cluster, Cloud and Grid Computing, 2010, p. 495-504.
A. Matsunaga, M. Tsugawa, and J. A. B. Fortes, “Virtual machines in transnational digital government: a case study”, in Proceedings of the 2005 national conference on Digital government research (poster), Atlanta, Georgia, 2005, p. 255-256.
A. Matsunaga, M. Tsugawa, and J. Fortes, “CloudBLAST: Combining MapReduce and Virtualization on Distributed Resources for Bioinformatics Applications”, in 2008 IEEE Fourth International Conference on eScience (eScience), Indianapolis, IN, USA, 2008, p. 222-229.
A. Matsunaga, P. Riteau, M. Tsugawa, and J. A. B. Fortes, “Crosscloud Computing”, in High Performance Computing: From Grids and Clouds to Exascale, vol. 20, F. Ian, G. Wolfgang, G. Lucio, and J. R. Gerhard, Eds. 2011, p. 94-108.
C. A. Metcalf, F. Fowze, T. Yavuz, and J. Fortes, “Extracting Configuration Parameter Interactions using Static Analysis”, in 2016 IEEE 24th International Conference on Program Comprehension, 2016, p. 1-4.
J. Miguel, A. Arruabarrena, R. Beivide, and J. A. B. Fortes, “An Empirical Evaluation of Techniques for Parallel Discrete-event Simulation of Interconnection Networks”, 4th Euro-micro Workshop on Parallel and Distributed Processing. 1996.
J. Miguel, A. Arruabarrena, R. Beivide, and J. A. B. Fortes, “An Evaluation of Implementations of the CMB Parallel Simulation Algorithm on Distributed Memory Multicomputers”, Journal of Systems Architecture, vol. 44, no. 6-7, p. 519–545, 1998.
B. Z. Miled and J. A. B. Fortes, “A Heterogeneous Hierarchical Solution to Cost-efficient High Performance Computing”, 8th IEEE Symposium on Parallel and Distributed Processing. 1996.
B. Z. Miled, J. A. B. Fortes, R. Eigenmann, and V. Taylor, “A Simulation-based Cost-efficiency Study of Hierarchical Heterogeneous Machines for Compiler- and Hand-Parallelized Applications”, in 9th IASTED International Conference on Parallel and Distributed Computing Systems (PDCS'97), 1997.
B. Z. Miled, R. Eigenmann, J. A. B. Fortes, and V. Taylor, “Hierarchical Processors-and-Memory Architecture for High Performance Computing”, Sixth Symposium on the Frontiers of Massively Parallel Computation (FRONTIERS '96) - Workshop on The Petaflops Frontier. 1996.
B. Z. Miled, J. A. B. Fortes, R. Eigenmann, and V. Taylor, “Towards the Design of a Heterogeneous Hierarchical Machine: A Simulation Approach”, 30th Simulation Conference. 1997.
V. M. Milutinovic, J. A. B. Fortes, and L. H. Jamieson, “A MISD Multiprocessor System for Real Time Computation of a Class of Discrete Fourier Transforms”, IEEE Transactions in Acoustics , vol. ASSP-34, no. Signal and Speech Processing, p. 1301-1310, 1986.
V. M. Milutinovic, J. A. B. Fortes, and L. H. Jamieson, “A MISD Pultiprocessor System for Real Time Computation of a Class of Discrete Fourier Transforms”, 1984 Real Time Systems Symposium. p. 165-174, 1984.
D. I. Moldovan and J. A. B. Fortes, “Partitioning and Mapping Algorithms into Fixed Size Systolic Arrays”, IEEE Transactions on Computers, vol. C-35, p. 1-13, 1986.
D. I. Moldovan, C. I. Wu, and J. A. B. Fortes, “Mapping an Arbitratily Large QR Algorithm into a Fixed Size VLSI Array”, 1984 International Conference on Parallel Processing. p. 364-375, 1984.
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M. Nakagami, J. Kon, G. Lee, J. A. B. Fortes, and S. Yamaguchi, “File Placing Location Optimization on Hadoop SWIM”, in 9th International Workshop on Advances in Networking and Computing (WANC’18), 2018.
K. Nakashima, J. Kon, G. Lee, J. Fortes, and S. Yamaguchi, “A Study on Big Data I/O Performance with Modern Storage Systems”, in IEEE International Conference on Big Data, Boston, MA, USA, 2017.
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M. T. O'Keefe and J. A. B. Fortes, “A Comparative Study of Two Systematic Design Methodologies for Systolic Arrays (Extended Version)”, International Workshop on Parallel Agorithms and Architectures. p. 313-324, 1986.
M. T. O'Keefe and J. A. B. Fortes, “On the Relationship Between Two Systolic Array Design Methodologies”, IEEE Transactions on Computers, vol. 42, 1992.
M. T. O'Keefe and J. A. B. Fortes, “A Comparative Study of Two Systematic Design Methodologies for Systolic Arrays”, International Conference on Parallel Processing. p. 672-675, 1986.
M. T. O'Keefe and J. A. B. Fortes, “Degradable Processor Arrays”, International Conference on Parallel Processing. p. 672-675, 1986.

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