Reliability Evaluation of Logic Circuits Using Probablistic Gate Models

TitleReliability Evaluation of Logic Circuits Using Probablistic Gate Models
Publication TypeJournal Article
Year of Publication2011
AuthorsHan, J, Chen, H, Boykin, E, Fortes, JAB
JournalMicroelectronics Reliability
Volume51
Issue2
Pagination468-476
Date Published02/2011