Publications and Presentations by the ACIS Lab

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Conference Proceedings
B. Z. Miled, R. Eigenmann, J. A. B. Fortes, and V. Taylor, “Hierarchical Processors-and-Memory Architecture for High Performance Computing”, Sixth Symposium on the Frontiers of Massively Parallel Computation (FRONTIERS '96) - Workshop on The Petaflops Frontier. 1996.
J. A. B. Fortes, V. M. Milutinovic, R. Dick, W. Helbig, and W. Moyers, “A High-Level Systolic Architecture for GaAs”, 19th Hawaii International Confernce on System Sciences (HICSS). p. 253-258, 1986.
M. Kandaswamy, V. Taylor, R. Eigenmann, and J. A. B. Fortes, “Implicit Finite Element Applications: A Case for Matching the Number of Processors to the Dynamics of the Program Execution”, 8th SIAM Conference on Parallel Processing. 1997.
V. Chadha, R. Illikkal, R. Iyer, J. Moses, D. Newell, and R. J. Figueiredo, “I/O Processing in a Virtualized Platform: A Simulation-Driven Approach”, Proc. ACM Virtual Execution Environments Conference (VEE). 2007.
M. Kumar, R. Newman, J. A. B. Fortes, D. Durbin, and F. Winston, “An IT Appliance for Remote Collaborative Review of Mechanisms of Injury to Children in Motor Vehicle Crashes”, In Proc. 5th International Conf. on Collaborative Computing: Networking, Applications and Worksharing. 2009.
K. Razavi, et al., “Kangaroo: A Tenant-Centric Software-Defined Cloud Infrastructure”, IEEE International Conference on Cloud Engineering (IC2E). 2015.
H. V. Shah and J. A. B. Fortes, “A Library-based Approach to Symbolic Polynomial Manipulation on Distributed Memory Machines”, 8th IASTED Conference on Parallel and Distributed Computing Systems. p. 233-237, 1996.
D. I. Moldovan, C. I. Wu, and J. A. B. Fortes, “Mapping an Arbitratily Large QR Algorithm into a Fixed Size VLSI Array”, 1984 International Conference on Parallel Processing. p. 364-375, 1984.
V. M. Milutinovic, J. A. B. Fortes, and L. H. Jamieson, “A MISD Pultiprocessor System for Real Time Computation of a Class of Discrete Fourier Transforms”, 1984 Real Time Systems Symposium. p. 165-174, 1984.
N. H. Kapadia, M. S. Lundstrom, J. A. B. Fortes, and K. Rooy, “Network-Based Simulation Laboratories for Microelectronics Systems Design and Education”, International Conference on Microelectronic Systems Education. p. 23-24, 1997.
J. A. B. Fortes and F. Parisi-Presicce, “Optimal Linear Shcedules for the Parallel Execution of Algorithms”, 1984 International Conference on Parallel Processing. p. 322-330, 1984.
K. Lee, T. W. Choi, A. Ganguly, D. Wolinsky, P. O. Boykin, and R. J. Figueiredo, “Parallel Processing Framework on a P2P System Using Map and Reduce Primitives”, 8th International Workshop on Hot Topics in Peer-to-Peer Systems (HotP2P 2011). p. 1602 -1609, 2011.
N. Kapadia, B. Lichtenberg, J. A. B. Fortes, J. L. Gray, H. J. Siegel, and K. J. Webb, “Parallel Solution of Unstructured Sparse Finite Element Equations”, Symposium on Antennas and Propagation, vol. 2. p. 1330-1333, 1995.
K. Jeong, R. J. Figueiredo, and K. Ichikawa, “PARES: Packet Rewriting on SDN-Enabled Edge Switches for Network Virtualization in Multi-Tenant Cloud Data Centers”, The IEEE International Conference on Cloud Computing (CLOUD) . 2017.
M. Collins, R. Tarvin, M. Kandziora, W. Dahdul, and D. Paul, “Phenomap - Challenges and Successes in Bringing Together Multiple Data Projects to Build New Visualizations of Phenotypic Information and Specimen Records”, Biodiversity Information Standards (TDWG). 2018.
K. Lee, D. Wolinsky, and R. J. Figueiredo, “PonD: Dynamic Creation of HTC Pool on Demand Using a Decentralized Resource Discovery System”, 21st International ACM Symposium on High-Performance Parallel and Distributed Computing (HPDC 2012). p. 161--172, 2012.
T. S. Kang, M. Tsugawa, J. Fortes, and T. Hirofuchi, “Poster: Reducing the Migration Times of Multiple VMs on WANs”, High Performance Computing, Networking, Storage and Analysis (SCC), 2012 SC Companion:. p. 1530-1530, 2012.
N. H. Kapadia, J. Fortes, and C. E. Brodley, “Predictive Application-Performance Modeling in a Computational Grid Environment,”, 8th IEEE International Symposium on High Performance Distributed Computing. 1999.
H. V. Shah and J. A. B. Fortes, “A Quasi-barrier Technique to Improve Performance of an Irregular Application”, 6th Symposium on the Frontiers of Massively Parallel Computation. p. 263-270, 1996.
R. J. Figueiredo, S. Aditya, K. Jeong, and K. Subratie, “Seamless Networking Among Edge Devices and Clouds with Fog Social Virtual Networks ”, Sensor to Cloud Architectures Workshop (SCAW, with HPCA). 2015.
N. H. Kapadia, J. A. B. Fortes, and M. S. Lundstrom, “The Semiconductor Simulation Hub: A Network-Based Microelectronics Simulation Laboratory”, 12th Biennial IEEE University Government Industry Microelectronics Symposium. p. 72-77, 1997.
X. Fu, T. Li, and J. A. B. Fortes, “Soft Error Vulnerability Aware Process Variation Mitigation”, The 15th International Symposium on High-Performance Computer Architecture. 2009.
J. A. B. Fortes, K. S. Fu, and B. Wah, “Systemic Approaches to the Design of Algorithmically Specified Systolic Arrays”, 1985 International Conference on Acoustics, Signal and Speech Processing, vol. 1. p. 300-303, 1985.
S. H. Zak and J. A. B. Fortes, “On the Systolization of Polynomial Matrix Manipulations”, Midcon/85. p. 23/5.1 - 23/5.8, 1985.
D. Wolinsky, Y. Liu, and R. J. Figueiredo, “Towards a uniform self-configuring virtual private network for workstations and clusters in grid computing”, the 3rd international workshop on Virtualization technologies in distributed computing. 2009.